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Add a new stage to generate zebin to align CUDA stages in triton.compile
#5189
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zebin to align CUDA stages in triton.compilezebin to align CUDA stages in triton.compile
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| stages["ttgir"] = lambda src, metadata: self.gluon_to_ttgir(src, metadata, options) | ||
| stages["llir"] = lambda src, metadata: self.make_llir(src, metadata, options) | ||
| stages["spv"] = lambda src, metadata: self.make_spv(src, metadata, options, self.device_arch) | ||
| stages["zebin"] = lambda src, metadata: self.make_zebin(src, metadata, options, self.device_arch) |
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We can't make this step mandatory yet (due to #5153 (comment)), but if we make it optional using options.generate_native_code, we can do a good refactoring right now.
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I refactor the code with options.generate_native_code. Please help to review the changes.
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Pull Request Overview
This PR adds a new "zebin" compilation stage for XPU backend to align with CUDA compilation stages in triton.compile. The change introduces zebin as a binary format alternative to SPIRV for Intel XPU targets.
- Adds
make_zebinmethod to generate zebin binary format from SPIRV input - Updates binary extension from "spv" to "zebin" for XPU backend
- Modifies compilation pipeline to handle zebin as a binary format alongside cubin and hsaco
Reviewed Changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 3 comments.
| File | Description |
|---|---|
| third_party/intel/backend/compiler.py | Adds zebin compilation stage and updates binary extension |
| python/triton/compiler/compiler.py | Updates file parsing and compilation pipeline to support zebin format |
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Instead of using ocloc to generate the native binary, can we use L0 to generate it ?
How about trying: https://oneapi-src.github.io/level-zero-spec/level-zero/latest/core/PROG.html#module-caching-with-native-binaries
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zebin to align CUDA stages in triton.compilezebin to align CUDA stages in triton.compile
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It L0 API requires passing the device context which is not avaliable during |
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| size_t global_range_y = {gridY}; | ||
| size_t global_range_z = {gridZ}; | ||
| size_t local_range_x = {num_warps} * {threads_per_warp}; | ||
| if (driver_version.find("+") != std::string::npos) {{ |
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This code doesn't make sense. Remove it.
… or option = {"generate_native_code": 1}.
Signed-off-by: Lu,Chengjun <[email protected]>
Add a new stage to generate
zebinfor XPU.